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  symbol parameter max. units v ds drain-source voltage 100 v v gs gate-to-source voltage 20 i d @ t c = 25c continuous drain current, v gs @ 10v 31  i d @ t c = 100c continuous drain current, v gs @ 10v 22 a i dm pulsed drain current  125 p d @t c = 25c maximum power dissipation 110 w p d @t a = 25c maximum power dissipation 3.0 linear derating factor 0. 71 mwc dv/dt peak diode recovery dv/dt  15 v/ns t j operating junction and -55 to + 175 c t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) www.kersemi.com 1 12/03/04 IRFR3410PBF irfu3410pbf hexfet   power mosfet v dss r ds(on) max i d 100v 39m ? 31a  d-pak irfr3410 i-pak irfu3410   high frequency dc-dc converters  lead-free benefits applications  low gate-to-drain charge to reduce switching losses  fully characterized capacitance including effective c oss to simplify design, (see app. note an1001)  fully characterized avalanche voltage and current parameter typ. max. units r jc junction-to-case ??? 1.4 r ja junction-to-ambient (pcb mount)* ??? 40 c/w r ja junction-to-ambient ??? 110 thermal resistance absolute maximum ratings

 2 www.kersemi.com parameter min. typ. max. units conditions g fs forward transconductance 33 ??? ??? s v ds = 25v, i d = 18a q g total gate charge ??? 37 56 i d = 18a q gs gate-to-source charge ??? 10 ??? nc v ds = 50v q gd gate-to-drain ("miller") charge ??? 11 ??? v gs = 10v,  t d(on) turn-on delay time ??? 12 ??? v dd = 50v t r rise time ??? 27 ??? i d = 18a t d(off) turn-off delay time ??? 40 ??? r g = 9.1 ? t f fall time ??? 13 ??? v gs = 10v  c iss input capacitance ??? 1690 ??? v gs = 0v c oss output capacitance ??? 220 ??? v ds = 25v c rss reverse transfer capacitance ??? 26 ??? pf ? = 1.0mhz c oss output capacitance ??? 1640 ??? v gs = 0v, v ds = 1.0v, ? = 1.0mhz c oss output capacitance ??? 130 ??? v gs = 0v, v ds = 80v, ? = 1.0mhz c oss eff. effective output capacitance ??? 250 ??? v gs = 0v, v ds = 0v to 80v  dynamic @ t j = 25c (unless otherwise specified) ns parameter typ. max. units e as single pulse avalanche energy  ??? 140 mj i ar avalanche current  ??? 18 a avalanche characteristics s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) ??? ??? showing the i sm pulsed source current integral reverse (body diode)  ??? ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.3 v t j = 25c, i s = 18a, v gs = 0v  t rr reverse recovery time ??? 84 ??? ns t j = 25c, i f = 18a q rr reverse recoverycharge ??? 260 ??? nc di/dt = 100a/s   t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) diode characteristics 31  125  static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 100 ??? ??? v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.11 ??? v/c reference to 25c, i d = 1ma  r ds(on) static drain-to-source on-resistance ??? 34 39 m ? v gs = 10v, i d = 18a  v gs(th) gate threshold voltage 2.0 ??? 4.0 v v ds = v gs , i d = 250a ??? ??? 20 a v ds = 100v, v gs = 0v ??? ??? 250 v ds = 80v, v gs = 0v, t j = 150c gate-to-source forward leakage ??? ??? 200 v gs = 20v gate-to-source reverse leakage ??? ??? -200 na v gs = -20v i gss i dss drain-to-source leakage current

 www.kersemi.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0. 1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 20s pulse width tj = 25c 0. 1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 20s pulse width tj = 175c    


 
    
     


 
    
  4. 0 5. 0 6. 0 7. 0 8. 0 9. 0 v gs , gate-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 175c v ds = 50v 20s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0. 0 1. 0 2. 0 3. 0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 30a v gs = 10v

 4 fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) coss crss ci s s v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 102030405060 q g total gate charge (nc) 0 4 8 12 16 20 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 80v vds= 50v vds= 20v i d = 18a 0.0 0.5 1.0 1.5 2.0 v sd , source-todrain voltage (v) 0.1 1.0 10.0 100.0 1000.0 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 1 10 100 1000 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec www.kersemi.com

 www.kersemi.com 5 fig 10a. switching time test circuit v ds 9 0% 1 0% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms    1   !" 0.1 %          + -   fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 25 50 75 100 125 150 175 t c , case temperature (c) 0 4 8 12 16 20 24 28 32 i d , d r a i n c u r r e n t ( a ) limited by package 1e-006 1e-005 0. 0001 0. 001 0. 01 0. 1 t 1 , rectangular pulse duration (sec) 0. 001 0. 01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response )

 6 www.kersemi.com q g q gs q gd v g charge d.u.t. v d s i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + -
 fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 12c. maximum avalanche energy vs. drain current r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j )     #$ #$  $

 www.kersemi.com 7 p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop r e-applied v oltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfet   power mosfets   
     
              ?     ?  ?     ! "" ? #  $  $   ?  %&    ? ' (  ?  %)   $    

 8 www.kersemi.com  

  

  12 in the assembly line "a" as s emb l ed on ww 16, 1999 example: with assembly this is an irfr120 lot code 1234 year 9 = 199 9 dat e code week 16 part number logo international rect ifier assembly lot code 916a irf u120 34 year 9 = 1999 dat e code or p = d e s i gn at e s l e ad - f r e e product (opt ional) note: "p" in as s embly line pos ition indicates "l ead-f r ee" 12 34 we e k 16 a = as s e mb l y s i t e code part number irf u120 line a logo lot code assembly international rectifier

 www.kersemi.com 9  
   
          
  as s e mb l y example: with assembly this is an irfu120 year 9 = 199 9 dat e code line a we e k 1 9 in the assembly line "a" as s embled on ww 19, 1999 lot code 5678 part numbe r 56 irf u120 international logo rectifier lot code 919a 78 note: "p" in as s embly line pos i ti on i ndi cates "l ead- f r ee"  56 78 as s e mb l y lot code rectifier logo international irfu120 part number we e k 19 dat e code year 9 = 1999 a = as s e mb l y s i t e code p = designates lead-free product (opt ional)

 10 www.kersemi.com   repetitive rating; pulse width limited by max. junction temperature.  i sd 18a, di/dt 360a/s, v dd v (br)dss , t j 175c 
  starting t j = 25c, l = 0.85mh r g = 25 ? , i as = 18a.  pulse width 300s; duty cycle 2%.  c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss   calculated continuous current based on maximum allowable junction temperature. package limitation current is 30a. * when mounted on 1" square pcb (fr-4 or g-10 material). for recommended footprint and soldering techniques refer to application note #an-994.  

  
         tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl n otes : 1 . controlling dimension : millimeter. 2 . all dimensions are shown in millimeters ( inches ). 3 . outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch


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